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    News

    Integration of IP cores: The natural way
    12/2/2003 - Eli Billauer
    Announcing the first release Perlilog, an innovative tool for automatic handling of IP cores written in Verilog. This tool opens a new way to creating Systems-on-Chip (SoC) quickly, reliably, and with minimal human effort.
    Go to the Perlilog page and download a copy.

    OpenTech cdrom
    6/12/2002 - Jamil Khatib
    Release 1.2.1 of OpenTech cdrom is available now.
    The new release contains more than 40 new free open source hardware releated design tools and free hardware designs.
    For more information visit OpenTech cdrom page

    Small risc core supports interrupts, compiles using free WebPack tools.
    5/12/2002 - John Clayton, risc16f84_clk2x author - John Clayton
    The risc16f84_clk2x core has been re-written to support interrupts, as tested by running c-code in a Xilinx XC2S200 FPGA. The code has now been ported to free Xilinx WebPack tools. Sample C-code is given. The debugger has automatic BAUD rate synchronization features.http://www.opencores.org/projects/risc16f84/

    Light multiplierless digital video encoder for FPGA and ASIC implementation
    26/9/2002 - Maxim Vlasov
    The Light Multiplierless Video Encoder project has been successfully completed and posted to the OpenCores IP repository. To learn more about this project, read an article about ultra-light broadcast quality digital video encoder, placed on this link: http://www.opencores.org/projects/lite_videocoder/Digital_video_encoder.PDF

    USB 1.1 Function IP Core Released
    19/9/2002 - OpenCores/ASICS.ws - Rudolf Usselmann
    Today ASICS.ws released it's USB 1.1 IP core. This is the 4th IP core from ASICS.ws in the last 4 days ! Based on the USB 2.0 IP Core, this version gets rid of the requirement for a micro-controller/CPU and performs all USB enumeration in hardware. For more information please visit: http://www.opencores.org/projects/usb1_funct/

    More news...


    Mailing list latest

    Repair of cells and metabol...
    17 Feb 2003 - Enid Mansi
    Title: Advanced HGH - Lose Weight while you sleep Hi, cores Experience up to an 82% IMPROVEMENT in BODY FAT Loss while erasing 10 YEARS in 10 Weeks! Endorsed by DOTORS Worldwide. Dr. Daniel Rudman's study in the New England Journal of Medicine represented...
    Read more
    Synthesis ...
    14 Feb 2003 - Lars Segerlund
    Is there any 'free' ( opensource ) tools for synthesis/routing/placement ? I have been looking around, but have only found the manufacturers tools for their different platforms. Would not such an effort be important to opencores ? / Lars Segerlund. ...
    Read more
    Testbenching using IEEE 102...
    14 Feb 2003 - H larsen
    Hi, Im interested in hearing if you have any good experience using IEEE 1029.1 WAVES Packages for test bench generation? Unfortunately, the packages defining the utilities are not open source, as they are copyrighted by IEEE. Before diving into this I am therefore interested in learning from people what their experiences are. regards henning larsen --------------------------------------------------------------------------- The IEEE 1029.1 WAVES...
    Read more


    Open source hardware news

    Musketeer Microcontroller IP Delivery System
    30/8/2002 - QuickCores - Jerry D. Harthcock
    Microcontroller IP Delivery System on 28-pin, .600" postage stamp features Actel ProASIC+ re-programmable FPGA, built-in programming voltages and LDOs, built-in JTAG boundary scan controller, JTAG real-time debugger, device programmer, RS-232, DAC/ADC. www.quickcores.com

    Silicore Corporation Transferes WISHBONE Stewardship to OpenCores
    14/8/2002 - Richard Herveille
    August 12, 2002

    Wade D. Peterson of Silicore Corporation announced today that he is transferring stewardship of the WISHBONE System-on-Chip Interconnection Architecture. Richard Herveille of the OpenCores organization was named as the new Steward.

    See the WISHBONE pages for the full press-release

    More news...

       

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